Digital Integrated Circuits

The design and manufacture of digital integrated circuits are among the biggest challenges facing the global technical industry. An example of this is the integrated circuits currently manufactured for the telephone industry. For the most advanced of them, it is possible to count no less than ten billion transistors. Managing such a mass of information requires the implementation of complex design methods and tools.

The current paradigm of design methods is based on the use of pre-characterized logic gate libraries. These libraries consider both the external environment such as the supply voltage (V) and the temperature (T) as well as the context of the manufacture of the circuits through the variability of the manufacturing process (P). It is only from the information contained in these that it will be possible to i) establish the performance in terms of frequency and consumption of the circuits being designed and ii) to guarantee a high manufacturing efficiency. All of these constraints, known as "PVT", are taken into account through a design method known as the CORNERS method.

In the context of the design and manufacture of digital integrated circuits, it is essential to have a good understanding of the basic components of digital integrated circuits: gates and flip-flops. Then, in order to grasp the complexity of digital architectures and design issues, the operating principle of the synchronous logic system will be dissected. Finally, having mastered the issues involved, students will be able to present and implement the various stages of the design flow, from specifications to the creation of libraries and the generation of manufacturing files.

English reading skills

Understanding component physics

Mastering Boolean algebra

Recommended prerequisites* :

Basic knowledge of the VHDL language

Knowledge of the Linux environment

• How it works

Synthesis of a combinatorial logic gate and projection onto a standard cell

Determining the performance and power consumption of a logic gate

Scale operation and limits

Operation and operating limits of a synchronous device

• Creating a pre-characterized library

• Behavioral simulation of a simple function

              Establish information flow

• Synthesis of a simple function and determination of performance, consumption and surface area

              Configuration - CORNER selection

              Constraint

              Summary

              Establish information flow

• Placement and routing and determination of performance, power consumption and surface area

              Configuration - CORNERS selection

              Floorplan (standard-cell, power grid)

              Placement

              Clock shaft (CTS)

              Routing

              Establish information flow

• Feeding grid taken into account in determining performance

              Configuration - CORNER selection

              Creating libraries

              Analysis

              Establish information flow

CM: 21h

Practical work: 21h