ECTS
5 credits
Training Structure
College of Sciences
Description
The design and manufacture of digital integrated circuits are among the greatest challenges facing the global technology industry. To illustrate this point, consider, for example, the integrated circuits currently manufactured for the telecommunications industry. The most advanced of these contain as many as ten billion transistors. Managing such a vast amount of information requires the use of complex design methods and tools.
The current paradigm for design methods relies on the use of pre-characterized logic gate libraries. These libraries take into account both the external environment—such as supply voltage (V) and temperature (T)—and the circuit manufacturing context, as reflected by manufacturing process variability (P). Only by using the information contained in these libraries is it possible to i) determine the frequency and power consumption performance of the circuits under design and ii) ensure high manufacturing yield. All of these constraints, known as “PVT,” are taken into account through a design method called the CORNERS method.
Objectives
In the context of the design and manufacture of digital integrated circuits, it will be essential to first thoroughly understand how the basic building blocks of digital integrated circuits—log gates and flip-flops—work. Next, to help students grasp the complexity of digital architectures and the challenges of design, the operating principles of synchronous logic systems will be thoroughly examined. Finally, armed with a solid understanding of these challenges, students will be able to learn about and implement the various stages of the design flow—from specifications to the creation of libraries and the generation of manufacturing files.
Mandatory Prerequisites
Knowing How to Read English
Understanding the physics of the component
Mastering Boolean Algebra
Recommended prerequisites*:
Have a basic understanding of the VHDL language
Understanding the Linux Environment
Course Outline
- How It Works
Synthesis of a Combinational Logic Gate and Projection onto a “Standard Cell”
Determining the Performance and Power Consumption of a Logic Gate
Operation and Operating Limits of Weighbridges
Operation and Operating Limits of a Synchronous Device
- Creating a Pre-Characterized Library
- Behavioral Simulation of a Simple Function
Establish the flow of information
- Synthesis of a Simple Function and Determination of Performance, Power Consumption, and Area
Configuration - Selecting the CORNER
Constraint
Summary
Establish the flow of information
- Placement, Routing, and Determination of Performance, Power Consumption, and Area
Configuration - Selecting CORNERS
Floor Plan (Standard Cell, Power Grid)
Investment
Clock Shaft (CTS)
Routing
Establish the flow of information
- Incorporating the power supply grid into performance calculations
Configuration - Selecting the CORNER
Creating Libraries
Analysis
Establish the flow of information
Additional Information
CM: 9:00 p.m.
TP: 9:00 p.m.