• ECTS

    5 credits

  • Training structure

    Faculty of Science

Description

The design and manufacture of digital integrated circuits are among the greatest challenges facing the global technology industry. To illustrate the situation, let us take the example of integrated circuits currently manufactured for the telephone industry. The most advanced of these contain no fewer than ten billion transistors. Managing such a vast amount of information requires the use of complex design methods and tools.

The current paradigm for design methods relies on the use of libraries of pre-characterized logic gates. These libraries take into account both the external environment, such as supply voltage (V) and temperature (T), and the circuit manufacturing context through manufacturing process variability (P). Only with the information contained in these libraries is it possible to i) establish the performance in terms of frequency and power consumption of the circuits being designed and ii) guarantee high manufacturing yield. All of these constraints, known as "PVT," are taken into account using a design method called the CORNERS method.

 

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Objectives

In the context of the design and manufacture of digital integrated circuits, it will be essential to first fully understand how the basic elements that make up digital integrated circuits work: gates and flip-flops. Next, in order to grasp the complexity of digital architectures and design challenges, the operating principle of the synchronous logic system will be analyzed in detail. Finally, with a solid understanding of the challenges involved, students will be able to present and implement the various stages of the design flow, from specifications to the creation of libraries and the generation of manufacturing files.

 

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Mandatory prerequisites

Knowing how to read English

Understanding the physics of the component

Mastering Boolean algebra

 

Recommended prerequisites:

 

Have a basic understanding of the VHDL language

Understanding the Linux environment

 

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Syllabus

  • Operation

Synthesis of a combinational logic gate and projection onto a standard cell

Determining the performance and consumption of a logic gate

Operation and operating limits of scales

Operation and operating limits of a synchronous device

 

  • Creation of a pre-characterized library

 

  • Behavioral simulation of a simple function

              Establish the flow of information

 

  • Synthesis of a simple function and determination of performance, consumption, and surface area

              Configuration - CORNER selection

              Constraint

              Summary

              Establish the flow of information

 

  • Placement and routing and determination of performance, consumption, and surface area

              Configuration - choice of CORNERS

              Floorplan (standard cell, power grid)

              Placement

              Clock shaft (CTS)

              Routing

              Establish the flow of information

 

  • Consideration of the power grid for performance determination

              Configuration - CORNER selection

              Creation of bookstores

              Analysis

              Establish the flow of information

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Additional information

CM: 9 p.m.

Practical work: 9 p.m.

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